博弈论作业代写 ECON 701代写 经济学作业代写 经济作业代写
10ECON 701 MODULE 9 EXERCISES 博弈论作业代写 Exercise 1. Draw the following two trees and give the function p by specifying what p(x) is for each x in X for both trees. Exercise 1. Draw ...
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射频和微波工程代写 Part 1 Introduction Passive microwave couplers are components that are required in a number of microwave applications.
Passive microwave couplers are components that are required in a number of microwave applications. Edge microstrip couplers provide broad bandwidths, however they are limited in terms of the values of coupling that they can achieve.
This assignment is designed to let you demonstrate the following:
1. Your understanding of some basic principles of microwave passive circuit design.
2. Your ability to use an industry standard simulator (AWR) in designing simple microwave passive couplers based on microstrip technology.
3. Your understanding of the limitations of this specific coupler technique.
Edge Coupled Microstrip Coupler Design – Centre frequency = 3.5 GHz
You need to design two couplers, one with Coupling C=20dB and one with Coupling C=10dB
First design and simulate a coupler with ideal coupled transmission lines to verify your odd and even mode calculations. [20%]
Then implement the design in microstrip, using a substrate material chosen from Table 1. Choose a substrate thickness (height) from the lists of available values in Table 1. The minimum line widths and gap dimensions that can be etched on the microstrip board are both 0.2 mm. Your line widths should be less than one quarter of a guided wavelength, to avoid generating higher order modes on the line. Use TxLine in AWR iteratively to select the optimum substrate thickness and the microstrip dimensions to achieve the required odd and even mode impedances, within these constraints. [30%]
Also include 50 ohm microstrip feed lines and bends or curves, arranged to make the distance between the feed lines at the board edge at least 1.26 cm, to accommodate the RF connectors. (But the connectors do not need to be included in the simulation.) Present a layout window to view your circuit and check that everything looks sensible. [20%]
Include rectangular graphs showing insertion loss, return loss, coupling and isolation of your coupler, for both the ideal transmission line version and the microstrip version, over a frequency range from 0.8fc to 1.2fc, where fc is your allocated centre frequency.
Add a polar plot showing the phase relationship between the direct and coupled port outputs.
Verify that your designs achieve the expected results, in both amplitude and phase of the SParameters [30%]
Low noise amplifiers (LNAs) and power amplifiers (PAs) play an important role in the transmitter and receiver of many wireless devices. Their performance can have a significant impact on the device’s overall performance, in particular, the noise figure, gain and bandwidth.
Literature Review
Read the paper “A Review of Technologies and Design Techniques of Millimeter-Wave Power Amplifiers,” IEEE T. Microwave Theory Techn., vol. 68, no. 7, 2020. Write a brief summary of the different solid-state technologies used to implement field-effect and bipolar transistors in the millimetre-wave frequency band. In your summary, you should describe the challenges, advantages and disadvantages of the different technologies. The summary should be less than one page. [10%]
In this part of the assignment you are required to investigate the design of a two stage LNA with gain greater than 20 dB and noise figure less than 2 dB. The investigation will focus on the noise figure, return loss and stability of the circuit.
You should begin by creating the high-level schematic for the two stage LNA circuit shown in Fig. 1(a). Note that the input, interstage and output matching networks should be implemented using simple Lsection impedance matching networks using transmission lines. The LNA uses two Infineon BFP520 bipolar transistors, shown in the transistor sub-circuit in Fig. 1(b). The model for this transistor can be found in the AWR elements browser under Circuit Elements -> Libraries -> AWR Website -> Parts by Vendor -> Infineon -> Data -> RF Bipolar Transistors -> Low Noise Si Transistors up to 5 GHz -> BFP520.
Use the biasing conditions V_{ce} = 1.0 V and I_{c} = 2.0 mA for the transistor. You do not need to include the DC bias networks for the transistors in your design or layout.
Figure 1 – (a) Top-level schematic for the two stage LNA. (b) Transistor sub-circuit without stabilisation elements.
You are required to demonstrate a logical and sound engineering approach to your design process. The following is the suggested approach; however, you may adopt an alternate approach provided it is appropriately explained and justified.
Begin the design process by adding components to the transistor sub-circuit in Fig. 1(b) to
ensure that it is unconditionally stable. You may do this by adding some frequency dependent resistance to the input or output of the transistor, or otherwise. Hint: plot the stability factor K and supplemental stability factor B1 of the transistor sub-circuit to see which frequencies are problematic, if any. Note that the stability analysis should cover all frequencies where oscillations are possible. [20%]
Now design L-section impedance matching networks using ideal transmission lines for both the interstage and output matching networks shown in Fig. 1(a). These matching networks should be optimised to maximise the gain of the two stage LNA (i.e. a conjugate impedance match). However, some trade-off in gain may be required to keep the noise figure of the LNA below 2 dB. [40%]
Plot the overall performance metrics for the two stage LNA, including noise figure, gain and return loss on a rectangular chart. You should also plot K and B1 to confirm unconditional stability of your LNA design. [15%]
Create a layout for the circuit using microstrip technology, choosing a suitable substrate material. The additional loss of the microstrip will increase the noise figure of the LNA which should be kept below 2.5 dB for the microstrip implementation. The layout will need to include space for components to be soldered onto the circuit board. Include a copy of the layout in your report. [15%]
You will need to create a report no more than 10 pages long for Part 1 and no more than 11 pages long for Part 2, including figures and appendices. You should include a title page with your full name and student ID number, as well as the module details. You should justify all your answers and calculations, describe your methodology, and interpret and discuss all results. The report will be assessed for clarity, completeness and correctness, using the criterion that a fellow engineer should be able to use the report to either adopt or adapt your design.
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